FMEDA: Failure rate on leaves and/or branches of a model

Question

This topic is migrated from NXP's Excel based requirement list for medini, entry MEDNXP084.     Background:  For FMEDA, the leaves of an hierarchical model usually represent some hardware with an associated failure rate. So far so good.   With the branch nodes of such an hierarchical model, the situation gets more tricky. Shall the have a failure rate and failure modes associated with them or not? This depends on the semantics of the model. Do these branches represent a real hardware entity or are they only virtual containers?  In most models, it's probably a mix.     Challenge: Currently medini allows only either to treat ALL branch nodes as virtual container without a failure rate or ALL branch nodes as real hardware entities. And then there is also the feature "failure rate = sum of children". Overall, medini features are not intuitive and puts strong limitations on how to model, e.g. when it comes to internal ports (virtual IP interfaces with not failure rate) and external ports (real device pins with a failure rate).     Request:  More clarity and a more intuitive solution is needed. This topic is meant to discuss this. The discussion shall lead to a guideline and/or new medini features if necessary.

medini_1036867805 · Answer

Original description and discussion MEDNXP084:  FMEDA sheet: It is a too string limitation to either have a failure rate only on "leaves" of the model or on all hierarchical levels ("branches" and "leaves"). This is particularly the case for ports. Sometimes ports represent purely virtual connections in the model (no HW), sometimes ports are used to represent real device interfaces (pad, wire and package pin HW).   2019-11-20 Emiliano will provide his full project as test case for ANSYS 2019-10-16 Example project has been provided. See meeting minutes