Following discussing with Jan,
Mentioned that it should be simple enough script.
When Importing IP_Design Model we are getting the entire Chip or Board with it's Hierarchach.
Then I need to allocate my SysModel to the IP_XML. and the Sys_model I need to enter manually.
The script that is needed:
Reverse Mapping feature script.
Point/Select to an element in the design IP_design assign it to SysModel With The the number of level Hierarchy then it will create that element in the Sysmodel
with level of Hierachy requested and To Destination
example:
Chip_top L1 To empty Sysmodel
Core L2 To Chip_top
PIN_IO L1 To Chip_top
ARM3 L3 To Core
ALU L1 To ARM3
PWM L1 To Core
Cache L1 To ARM3
PLL L1 To Chip_top
It will create allocated SysModel with all interconnect between them.
This will enable to deal with Complex SoC. otherwise, it is impossible.

Results Will be something like this that matches the instruction above
